VLSI FOR TELECOMMUNICATION SYSTEMS
Through these two case studies within the ATM domain, we have shown the main common characteristics to telecommunication ASIC design. Briefly speaking, these features are the following:
- Different clock domains can coexist and, therefore, techniques to reduce the probability of having a metaestable behavior have to be applied in the design.
- High throughput networks imply dealing with high frequency clock designs (hundreds of megahertzs).
- FIFO Memories are usually needed to either separate different clock domains or store information before accessing a common resource.
- Designs are mainly dominated by the presence of registers.
This chapter edited by E. Juarez, L. Cominelli and D. Mlynek
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