Section 6 of 6

2.6 Summary

This chapter has illustrated a wide range of environments that can be provided for digital electronic design. Each environment consists of primitive components and their connections. It is important that an environment model the designer's notions of circuitry and provide a comfortable means of communication with the design system. Environments exist at many levels of specification to help designers from the machine architect to the IC mask designer. There are even some environments that have nothing to do with electronics. All together, it should be seen that a well-planned set of components can be a great aid to design, and a good collection of environments can work together to provide a powerful design facility.

Questions

1. How would you modify PMS for modern computer architectures?
2. What is the most difficult aspect of translating from dataflow to control flow?
3. Propose an alternative organization of design environments to the one in Fig. 2.2.
4. How would you change the schematics environment to include wires with multiple signals (such as buses or transmission lines)?
5. How does the sticks environment differ from the schematics environment?
6. How would you graphically describe the ISP environment?
7. Why is CMOS design more difficult than nMOS?
8. Convert the AND, OR, NOT, and IMPLICATION to equivalent logic using only NOR.

References

• Baray, Mehmet B. and Su, Stephen Y. H., "A Digital System Modeling Philosophy and Design Language," Proceedings 8th Design Automation Workshop, 1-22, June 1971.
• Bell, C. Gordon; Grason, John; and Newell, Allen, Designing Computers and Digital Systems Using PDP 16 Register Transfer Modules, Digital Press, Maynard, Massachusetts, 1972.
• Bell, C. Gordon and Newell, Allen, Computer Structures: Readings and Examples, McGraw-Hill, New York, 1971.
• Bell, J. L. and Slomson, A. B., Models and Ultraproducts: An Introduction, North-Holland and American Elsevier, New York, 1971.
• Davis, A. L. and Drongowski, P. J., "Dataflow Computers: A Tutorial and Survey," University of Utah UUCS-80-109, July 1980.
• Dennis, J. B., Fosseen, J. B., and Linderman, J. P., "Data Flow Schemas," Proceedings International Symposium on Theoretical Programming, 187-216, 1972.
• Department of Defense, "Graphic Symbols for Logic Diagrams," MIL-STD-806B, Washington, D.C., February 1962.
• Feller, A., "Automatic Layout of Low-Cost Quick-Turnaround Random-Logic Custom LSI Devices", Proceedings 13th Design Automation Conference, 79-85, June 1976.
• Gibson, Dave and Nance, Scott, "SLIC-Symbolic Layout of Integrated Circuits," Proceedings 13th Design Automation Conference, 434-440, June 1976.
• Glasser, Lance A. and Dobberpuhl, Daniel W., The Design and Analysis of VLSI Circuits, Addison-Wesley, Reading, Massachusetts, 1985.
• Malachi, Yonatan and Owicki, Susan S., "Temporal Specifications of Self-Timed Systems," Proceedings C-MU Conference on VLSI Systems and Computations (Kung, Sproull, and Steele, eds), Computer Science Press, 203-212, 1981.
• Moszkowski, Ben, "A Temporal Logic for Multilevel Reasoning about Hardware," IEEE Computer, 10-19, February 1985.
• Newkirk, John and Mathews, Robert, The VLSI Designer's Library, Addison-Wesley, Reading, Massachusetts, 1983.
• Patil, Suhas S., "An Asynchronous Logic Array," Project MAC tech memo TM-62, Massachusetts Institute of Technology, May 1975.
• Rodriguez, Jorge E., A Graph Model for Parallel Computations, PhD dissertation, Massachusetts Institute of Technology, Report MAC-TR-64, September 1969.
• Schediwy, Richard R., A CMOS Cell Architecture and Library, Masters thesis, University of Calgary Department of Computer Science, 1987.
• Siewiorek, Daniel P.; Bell, C. Gordon; and Newell, Allen, Computer Structures: Principles and Examples, McGraw-Hill, New York, 1982.
• Szabo, Kevin S. B.; Leask, James M.; and Elmasry, Mohamed I., "Symbolic Layout for Bipolar and MOS VLSI," IEEE Transactions on CAD, CAD-6:2, 202-210, March, 1987.
• VanCleemput, W. M., "An Hierarchical Language for the Structural Description of Digital Systems," Proceedings 14th Design Automation Conference, 377-385, June 1977.
• Weste, Neil, "Virtual Grid Symbolic Layout," Proceedings 18th Design Automation Conference, 225-233, June 1981.
• Weste, Neil and Eshraghian, Kamran, Principles of CMOS VLSI Design, Addison-Wesley, Reading, Massachusetts, 1985.
• Williams, John D., "STICKS-A graphical compiler for high level LSI design," Proceedings AFIPS Conference 47, 289-295, June 1978.

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Steven M. Rubin

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