Figure 3.21 shows the signal flow graph for the implementation of our example filter using parallel second-order sections (with one first-order section since the number of poles is odd). This is the same filter as that shown in Fig.3.1 with , , , and . The second-order sections are special cases of the ``biquad'' filter section, which is often implemented in software (and chip) libraries. Any digital filter can be implemented as a sum of parallel biquads by finding its transfer function and computing the partial fraction expansion.

The two second-order biquad sections in Fig.3.21 are in so-called
``Direct-Form II'' (DF-II) form. In Chapter 9, a total of four
direct-form filter implementations will be discussed, along with some
other commonly used implementation structures. In particular, it is
explained there why *Transposed* Direct-Form II (TDF-II) is
usually a better choice of implementation structure for IIR filters
when numerical dynamic range is limited (as it is in fixed-point ``DSP
chips''). Figure 3.22 shows how our example looks using TDF-II
biquads in place of the DF-II biquads of Fig.3.21.

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